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Thursday, 12 November 2026 · Pakistan

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AMD Launches 6th Gen EPYC Venice Chips With Up to 256 Cores for AI Agents

By The Daily Byte ·11 Nov 2026 ·2 min read
Silver AMD EPYC server processor chip with AMD and EPYC branding

AMD has launched its 6th Gen EPYC server processors, codenamed Venice, with up to 256 cores per chip and a design aimed squarely at the AI agent workloads now filling data centres. The ten-chip line, announced on 10 November 2026, is generally available now, with servers already shipping from major data centre suppliers. It is built on AMD's new Zen 6 architecture, manufactured on TSMC's two-nanometre process.

The range is split into two groups. The densest chips pack 256 cores, each running two threads for 512 threads per socket, at a 2.55 GHz base speed, so a single processor can run a large number of AI agents at once. The high-frequency chips take the opposite approach: 96 cores running at a 4.05 GHz base speed and boosting to 5.3 GHz, with 384 MB of cache, for workloads that need fewer but faster cores. AMD says the Zen 6 architecture delivers 31% higher instructions per clock on AI workloads than its previous design, and that the new chips can support up to 3.3 times more agents per watt than Nvidia's Vera CPU, a vendor claim that has not been independently tested.

Built for the age of AI agents

AMD is pitching the chips at the way AI agents actually work in a data centre. The agents run their neural networks on graphics cards, but use CPUs to power their tools, the applications through which they carry out tasks. The new architecture adds AI-specific optimisations, including support for the FP16 data format and improved VNNI-INT8 support, which compresses several AI calculations into a single operation. There is also a cost argument: some enterprise software, notably databases, is billed by the number of cores it runs on, so one fast core can be cheaper than two slower ones doing the same work.

Availability

Servers equipped with the new processors are already shipping, and Microsoft Azure and Oracle Cloud Infrastructure are preparing cloud instances powered by the chips, aimed at AI inference and chip design workloads. Dan McNamara, senior vice president and general manager of AMD's Compute and Enterprise AI unit, said AI was significantly expanding the role of the CPU across every layer of the data centre, and that customers could standardise on the proven x86 foundation while choosing a workload-optimised chip to run more agents.